1. Field of the Invention
The present invention relates to a charge pump circuit that generates the high voltages required for data erase and read/write operations on a non-volatile memory such as a flash memory, and to a semiconductor integrated circuit using the same.
2. Description of the Related Art
To use a tunneling effect or hot electrons and/or hot holes during erase and/or write operations, a high voltage needs to be generated in non-volatile memories such as a flash memory or an EEPROM (Electrically Erasable Programmable Read-Only Memory).
Electrically rewritable EEPROMs include a metal-oxide nitride-oxide semiconductor (MONOS) type of EEPROM, and the operating biases in the erase, write, and read modes of the MONOS-type EEPROM that uses MONOS-structured memory cells and enhanced N-type switch metal-oxide semiconductors (MOS's) to construct a one-bit data pattern are shown in FIG. 1 by way of example.
The operating biases in FIG. 1 are for a power supply voltage of Vdd=1.5 V. In this case, the memory cells in erase mode take a threshold voltage value (Vt) less than 0 V, and the memory cells in write mode take a Vt value of 0 V or more.
Accordingly, since in read mode, applying 0 V to a memory gate (Mg) and 1.5 V to a selected switch MONOS control gate (Cg) turns on the switch MOS, whether the data bit is “1” or “0” has been judged by, in the erase mode of the associated memory cell, detecting that a current flows from a bit line (precharged to about 1 V) through that memory cell into a source line and the potential of the bit line decreases. Also, in the write mode of the memory cell, the above judgment has been conducted by detecting that the potential of the bit line precharged to about 1 V is retained. In this case, H-Z shown in FIG. 1 denotes high impedance.
Such a Dickson-type charge pump circuit as introduced and analyzed in the article of T. Tanzawa and T. Tanaka, “A dynamic analysis of the Dickson charge pump circuit,” IEEE J. Solid-State Circuits, vol. 32, no. 8, pp. 1231–1240, August 1997, is generally known as an example of a charge pump circuit for generating the high voltage required for erase and/or write operations. The Dickson charge pump circuit is commonly used because of its simple circuit composition.
Although EEPROMs have long been frequently used in data update applications, further extension of EEPROMs in capacity is being desired in recent years in order to respond to the diversity of application software and the growing tendency for multiple application programs to be designed so that they operate in one LSI or one system.
Japanese Patent Nos. 1876108 and 1950956 propose MONOS memories without an enhanced N-type switch MOS (i.e., single-MONOS memories), partly because such extension of capacity is obstructed by the fact that the memory size per bit is too large.
The biases in the operation modes of one such single-MONOS memory are shown in FIG. 2. As can be seen from FIG. 2, the operating biases in erase and write modes are almost the same as for the conventional MONOS memory shown in FIG. 1, whereas, in read mode, a negative voltage of erase Vt or less needs to be applied to the memory Well and non-selected Mg.
Additionally, although all voltages to be applied to the memory may be set to 0 V in standby mode, startup from standby mode requires a time from several microseconds to tens of microseconds in order to obtain a stepped-up negative voltage that allows reading. Also a negative voltage is therefore to be applied in standby mode to increase the startup speed. In this case, symbol H-Z shown in FIG. 2 denotes high impedance.
When the size of a module type of such single-MONOS memory, including the size of a peripheral circuit, is considered, the memory itself can be downsized by deleting the switch MOS. However, a stepped-up negative voltage must also be applied in read mode and thus a charge pump circuit for reading is required. In addition, this charge pump circuit for reading needs to be increased in current supply capability so as to be capable of withstanding high-speed reading at about tens of megahertz.
In that case, in addition to the charge pump circuit for erase and write modes, a read-only charge pump circuit high in current supply capability is required, whereby it is likely to increase the total charge pump circuit size.
Additionally, since standby mode, as with read mode, makes it necessary to apply a stepped-up negative voltage, there is also a need to operate the associated charge pump circuit in standby mode, and for this reason, current consumption could increase in standby mode.